Module 2
Prabir Debnath
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Module 2
464 просмотра · 11 лет назад
Prabir Debnath
5 подписчиков
464 просмотра · 11 лет назад
2. Verilog HDL
• Introduction to HDL
Need of HDL
Advantages of HDL
Types of HDL
• Design methodologies
• Verilog Program structure
Module
Instance
Ports
• Data Types
• Parameters
• System Tasks And Compiler Directives
• Simulation
Design Block
Stimulus Block
• Different Style of modeling
Gate Level Modeling
Data Flow Modeling
Behavioral Modeling
Switch level Modeling