RISC-V Single Cycle Processor: RTL Design, Integration, and Testing (In Arabic)

This video provides a comprehensive guide to designing and implementing an RISC-V Single Cycle Processor entirely in Arabic. Starting from RTL design, we cover integration and functional testing in detail. Code & PDF used : https://github.com/HossamSeyam-Hub?ta... Video sections : --------------------------- 1- Introduction : ********************** 00:00 : Introduction. 2- Design Blocks : ********************** 01:07 : Architecture & Program Counter. 02:07 : Instruction Memory. 03:21 : Extended Unit. 09:05 : Register File. 11:08 : ALU input multiplexer. 12:01 : ALU. 14:25 : Data Memory. 15:27 : Jump multiplexer. 16:49 : Adder 4. 17:07 : Adder Target. 17:27 : PC multiplexer. 17:58 : Main decoder. 19:51 : ALU decoder. 3- Integration : ********************** 23:14 : Integration. 3- Testing : ***************** 27:34 : Testing