Logic Design Lab 4 | Half Adder Circuit KSIU

Lab 4 – Half Adder Circuit | KSIU CS Lvl 2 In this lab, we designed and tested a Half Adder circuit to understand how binary addition works using basic logic gates. The experiment demonstrates how the circuit produces Sum and Carry outputs using XOR and AND gates. Hashtags: #KSIU #CSE #LogicDesign #HalfAdder #DigitalElectronics #Lab4 #CSLevel2 #Engineering #TechStudents #CircuitDesign #ElectronicsLab #ksiu #computerscience #engineeringstudents