The SR Latch: Memory Is a Loop

How can a circuit remember a bit? The answer begins with feedback: feeding a circuit’s output back into its own input allows it to maintain a state even after the original input is removed. This is the basic idea behind digital memory. In this video, we build an SR latch from two NOR gates and see how feedback creates two stable states. We explore how set and reset control the stored bit, why the two inputs cannot be asserted together, and how the latch’s behavior appears over time. 0:00 A button that remembers 0:24 A gate forgets 0:49 Memory is a loop 1:44 Two NOR gates 2:38 Set, reset and hold 3:07 Pressing both at once 3:49 Memory over time 4:24 Every bit is a loop Music: Johann Pachelbel, Canon in D, arranged for piano, and Erik Satie, Gymnopédie No. 1, public domain, played for this video on the FreePats Upright Piano KW (CC0). #digitaldesign #digitallogic #logicgates #computerscience #electricalengineering