M3L1 AI for Semiconductor Manufacturing / Module - Defect Classification - Lecture 1

Course website: https://aikhan123.github.io/khan-lab-... Classifying wafer-map defect patterns: from logistic regression to deep networks to convolutions. A finished wafer carries a map of which dies passed and which failed, and the spatial pattern of the failures — a ring, a scratch, a central blob — points back to what went wrong on the line. This lecture takes a real data set of those maps and builds up, from nothing, the models people actually run on them, one at a time, watching where each one succeeds and exactly where it breaks. Covered in this lecture: What a wafer map is, and why classifying its defect pattern is not ordinary image recognition The WM-811K data set: severe class imbalance, noisy labels, and a lot-level leakage trap hiding in the train/dev/test split Machine learning from first principles — logistic regression, the sigmoid, cross-entropy loss, and gradient descent on a two-feature example Logistic regression drawn as a single neuron, and where the bias offset enters What a hidden unit is, and how stacked ReLU units bend a straight boundary into a curve Deep neural networks: backpropagation, a softmax over nine classes, and a real experiment showing a million-parameter network does no better than logistic regression on flattened pixels Convolutional networks: filters as pattern detectors, padding, stride, pooling, and why weight sharing buys translation invariance Why the CNN finally catches the position-varying defects (Loc, Scratch) that everything else misses Scoring imbalanced classifiers: precision, recall, F1, macro-F1, and why accuracy alone misleads A parameter scoreboard — logistic regression vs. deep nets vs. CNN — and why structure beats raw capacity Graduate level. Assumes fab basics (lot, die, probe test); no machine-learning background required. Watch Defect Classification 1 first. A hands-on exercise reproduces the models on the WM-811K wafer maps, with train / dev / test sets provided as .npz files. Wafer-map data set: M.-J. Wu, J.-S. R. Jang, J.-L. Chen, "Wafer Map Failure Pattern Recognition and Similarity Ranking for Large-Scale Data Sets," IEEE Transactions on Semiconductor Manufacturing, 28(1), 1–12, 2015. doi:10.1109/TSM.2014.2364237 Asif Khan Associate Professor, School of Electrical and Computer Engineering, and School of Materials Science and Engineering Georgia Institute of Technology ECE 8803-AI4 — AI for Semiconductor Manufacturing