Digital Logic – Lecture 12 | Encoders, Decoders, MUX & DEMUX | BSc CSIT 1st Sem

Welcome to Lecture 12 of the Digital Logic series for BSc CSIT 1st Semester! In this video, we cover key data routing combinational circuits: Encoders, Decoders, Multiplexers (MUX), and Demultiplexers (DEMUX) with implementation examples. 📌 Topics Covered in This Video: Encoder, Decoder & Implementation of Decoder Full Adder Implementation with Decoder Multiplexer (4x1, 8x1, 16x1 MUX) Demultiplexer (1x4, 1x8 DEMUX) 🎯 Who is this video for? BSc CSIT 1st Semester students (Tribhuvan University / TU) BCA, BIT, and Computer Engineering students studying Digital Logic Anyone preparing for university semester examinations or entrance tests 🔔 Don't forget to Like, Share, and Subscribe for the complete BSc CSIT lecture series! Drop any questions in the comments below.