DLD Varispeed LOOP Custom Firmware - Pitch-Shift Frozen Loops - 4ms Dual Looping Delay

This custom firmware adds quantized varispeed looping to Infinite Hold on the 4ms Dual Looping Delay. When a loop is frozen, changing TIME/FREQ changes the playback speed and pitch of the audio already in the buffer so the entire captured loop fits the newly selected quantized delay time. Longer times slow and pitch the loop down; shorter times speed and pitch it up, while keeping the complete loop intact. Release Infinite Hold and the transformed loop is written back into the normal delay, where it can continue according to Feedback, accept new overdubs, and be frozen and transformed again. It also works with Reverse, the TIME range switch, external TIME/FREQ CV, and external Ping clocking. A note about releasing Infinite Hold When Infinite Hold is released, the firmware needs time to write/materialize the transformed loop back into the normal delay buffer. If you make another change too quickly—particularly with longer/slower loops—the transfer may not have time to complete, and the transformed loop may not carry over into the feedback trail after hold is released. For those interested in how the firmware pulls this off- It snapshots the frozen loop’s SDRAM length and uses a 16.16 fixed-point phase accumulator with linear interpolation to read the same captured buffer at different speeds. The playback rate is calculated from the relationship between the original captured length and the newly selected delay length. When releasing a slowed/lengthened transformation, the resulting loop is materialized into a safe non-overlapping SDRAM region at full sample resolution before returning to the DLD’s normal read/write system. This allows clean feedback and full-quality overdubbing after the transformation. Disclaimer: This is unofficial experimental firmware and is not affiliated with or supported by 4ms Company. Although it has been extensively tested and the DLD’s normal audio bootloader/recovery process remains available, I cannot guarantee compatibility, stability, or safety on other hardware. Install and use it entirely at your own risk. I am not responsible for damaged hardware, lost data, failed firmware updates, or any other problems resulting from its use. License / Attribution: This is an unofficial modification of the open-source 4ms DLD firmware by Dan Green / 4ms Company. Original DLD firmware Copyright © 2016 Dan Green. The firmware download includes the original DLD license and copyright notice. This modification is not affiliated with or supported by 4ms Company. Hardware Compatibility: This release is DLD Varispeed LOOP Firmware 1.1 (not for PCB v1.2-F446) Successfully tested on: PCB v1.0 — STM32F427IGT6 PCB v1.1 — STM32F427ZGT6 If you're unsure, check the writing on the large square STM32 processor: STM32F427 / 32F427 → Use this version STM32F446 / 32F446 → DO NOT use this version A separate F446-compatible build is planned. Download: version 1.1 https://drive.google.com/file/d/1FJ2q... Here is some extra info on pitch and how it relates to the time mults/divisions. DLD VARISPEED PITCH GUIDE: The pitch change depends on the ratio between the TIME setting where the loop was frozen and the new TIME setting. This guide explains the relations when a Loop captured/frozen at TIME = 8 (noon) and the range switch is set to medium or high. TIME 1 = +3 octaves TIME 1.5 = about +2 octaves + perfect 4th TIME 2 = +2 octaves TIME 3 = +1 octave + perfect 4th TIME 4 = +1 octave TIME 5 = about +minor 6th TIME 6 = +perfect 4th TIME 7 = about +whole tone TIME 8 = original pitch TIME 9 = about -whole tone TIME 10 = about -major 3rd TIME 11 = about -4th/tritone TIME 12 = -perfect 5th TIME 13 = about -minor 6th TIME 14 = about -minor 7th TIME 15 = about -major 7th TIME 16 = -1 octave