Webinar – SoC Boot Up Timing Analysis using Arm System Trace Macrocell

In this webinar, we will take a detailed look at the profiling of a boot-up process on Cortex-A bases System-On-Chips (SoCs), starting from 1st stage bootloaders until the startup of a Linux kernel. We will see how the Arm System Trace Macrocell (STM) can be utilized for tracing a boot process distributed across multiple cores, e.g., Cortex-R7 boot core and Cortex-A53 application cores. 0:00 Intro 2:59 Agenda and motivation 5:04 Introduction to ARM System Trace Macrocell (STM) 7:06 Introduction to SoC Boot-up Process (R-Car M3) 9:24 Bootloader Instrumentation demo 20:19 winIDEA Analyzer Configuration 22:07 Two ways of winIDEA Trace Analyzer STM Configuration (XML file and GUI method) 23:00 winIDEA Trace Analyzer STM Configuration - GUI method 25:11 Trace Recording and results 25:52 Conclusion 27:47 Answers and Questions The goal of this webinar is to give users a full understanding of the necessary steps, starting from the instrumentation of the bootloaders, configuring the trace tool, and the actual recording on the target SoC. The concept will be demonstrated on a Renesas R-Car H3 SoC.