Artix-7 FPGA: Binary to BCD Converter in Verilog

In this video, we show how to use a provided Binary-to-BCD Converter IP on an Artix-7 FPGA. The IP converts a signed fixed-point value in S(a.b) format into Binary-Coded Decimal (BCD), allowing the result to be sent to the SSEG IP and displayed as a human-readable decimal number on the FPGA’s seven-segment displays. The complete system is demonstrated by converting and displaying the value 783.8650 in real time. FPGA textbooks: 💻 Digital Editions (Instant Access + Discount): https://truesightlabs333.com/ FPGA textbooks (Physical Copies): 📗Introductory Book: https://www.amazon.com/dp/B0D92325VC 📘Advanced Book: https://www.amazon.com/dp/B0F7QVT2T8 📺 Full playlist:    • Advanced FPGA Course: Verilog Based Roboti...   ⏱️ Video Chapters 0:00 Intro 0:25 What Is BCD? 0:52 SSEG IP Review 1:44 Why BCD Is Needed 2:26 BCD + SSEG 2:59 Demonstration #FPGA #Verilog #Artix7 #BCD #DigitalDesign #Vivado #HardwareDesign #BinaryToBCD